Dump DM368 PLL clock output configuration.
In previous post i found that chip outputs CLKOUT0.
I guess that is the image sensor clock source, so i have to know configuration of PLLs.
So i extend d_pinmux
to print more info from system module and wrote dumper for PLL regirters.
# ./ipnc/d_pll
--------------------
PLLC1:
PID: 0x0001080E
TYPE: 01
CLASS: 08
REV: 0E
OCSEL: 0x00000010
OCSRC: 1
OSCDIV1: 0x00000000
OD1EN: 0
RATIO: 0
CKEN: 0x00000003
OBSCLK: 1
AUXEN: 1
CKSTAT: 0x0000000B
BPON: 1
OBSON: 1
AUXEN: 1
--------------------
PLLC2:
PID: 0x0001080E
TYPE: 01
CLASS: 08
REV: 0E
OCSEL: 0x00000010
OCSRC: 1
OSCDIV1: 0x00000000
OD1EN: 0
RATIO: 0
CKEN: 0x00000000
OBSCLK: 0
AUXEN: 0
CKSTAT: 0x00000008
BPON: 1
OBSON: 0
AUXEN: 0
Findigs:
- CLKOUT0 provide 24 MHz clock via GIO37.
- Sensor reset still not known.
PS: I alredy done with starting vanilla Linux 3.18 on this board, but without imager, only Ethernet, NAND, DS1337 RTC. But with strange error, i can’t use NFS root because EMAC don’t see anything. But if i start from nand (original cramfs) network works. Also now i know that TS81 chip is unique ID/serial ID chip with I2C bus. I guess that this is custom made variant from one of ID chips, pin layout same as on 24XX flash chips (i know only GND,VCC,SCL,SDA), I2C address 0x0A (one unknown device on bus for me).
Original rootfs trying to load video processing drivers (DVSDK) and when it fails some of daemons spams about TS80 read error, and “illigal copy” of device.